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Título del libro: Proceedings - 2012 Ieee Computer Society Annual Symposium On Vlsi, Isvlsi 2012
Título del capítulo: A hardware architecture for image clustering using spiking neural networks

Autores UNAM:
HECTOR HUGO AVILES ARRIAGA;
Autores externos:
Idioma:
Año de publicación:
2012
Palabras clave:

Computer hardware; Computer vision; Field programmable gate arrays (FPGA); Neural networks; Computer vision applications; Critical tasks; Degree of parallelism; Digital elements; Digital hardware systems; Fine grains; FPGA devices; Hardware accelerators; Hardware architecture; Hardware implementations; Image clustering; Performance statistics; Spiking neural networks; Hardware

Resumen:

Spiking Neural Networks (SNNs) have become an important research theme due to new discoveries and advances in neurophysiology, which states that information among neurons is interchanged via pulses or spikes. FPGAs are widely used for implementing high performance digital hardware systems, due to its flexibility and because they are suitable for the implementation of systems with high degree of parallelism. FPGAs have become an important tool because fine grain digital elements useful for efficient hardware implementation of SNNs are provided, making FPGA device suitable for implementing SNNs. SNNs are less hardware greedy, and the nature of the pulsed processing is well suited to the digital processing blocks of the FPGA devices. Several computer vision applications have been implemented using SNNs. One of the most critical tasks in computer vision is image clustering. In this paper, a hardware architecture for implementing image clustering using SNNs is reported. Results and performance statistics are provided. © 2012 IEEE.

Entidades citadas de la UNAM:
Fuente:


ISBN:
9780769547671
Editorial:

Tipo de producto:
Conference Paper



DOI:
10.1109/ISVLSI.2012.46